Project Objectives:

• Evaluate performance & ease of use of measurement solutions for interface board application.
• Increase wafer sort quality on basis of scan & enhanced IDDQ tests.
• Reduce overall test costs.
• Pave the pathway for high quality tests using a low-cost DFT test platform.
• IDDQ Fault coverage >= 95%.

Module and Test platform

• QD-1000 on QI-0003 support module.
• Verigy 83K & 93K test systems.

Test Vehicles:

• Motorola DFT Chip
• Motorola Product:
• 300K gates – 8K RAM – DSP processor core – Analog circuitry
• TSMC 0.18µm CMOS
• 3 supplies – I/O, Analog, Core (IDDQ)
• 61 I/O – 84 MBGA, 4340 * 4340 µm2
• Typical leakage: 30µA

Automated Test Pattern Generation and Test Program Creation Flow:

• Add monitor black box info to circuit netlist  --> Modified netlist (DUT + monitor)
• ATPG Scan & IDDQ vector generation (FastScan, IDDQ Fault coverage target: > 95%)
• Add monitor configuration routine at the start of the test program
• Insert monitor timing at IDDQ strobe points identified by the ATPG tool
• Generation of tester specific file (convert WGL to ATE specific format)

Results:

Making use of the QI-0003 monitor product, with a typical measurement time of 100µs per measurement, allowed to drastically increase the number of Iddq vectors used whilst considerably reducing the total IDDQ test time, thereby reducing test costs and gaining in product quality. The results obtained further pave the pathway for running a high quality Scan+IDDQ based test approach on low cost DFT platform.

• number of Iddq vectors:     increased from 40 to 911    (23x increase)
• Total Iddq test time:          reduced from 1.2s to 0.315s  (4x reduction)
• Measurement time:           reduced from 30ms to 150µs/vector   (200x reduction)
• Overall gain factor :           ~92
• Savings (test time only):    60k$/Mdev,
• plus (not quantified) reduced die cost, reduced packaging cost, reduced FA costs, less field returns, …
• Improved product quality

Conclusion:

Making use of Q-Star Test’s high quality and high speed interface board add-on solutions allows Motorola to increase the number of IDDQ vectors used and meanwhile to simplify its test process, cut on test time, reduce product costs and in addition to improve its product quality.

References:

• Manhaeve H., Vaccaro J, Benecke L., A Real World Application Used to Implement a True IDDQ based Test Strategy. Proceedings of the IEEE International Workshop on Current and Defect Based Testing DBT2002, pp. 53-60, 28 April 2002, Monterey, California.
• Manhaeve H., Vaccaro J, Benecke L, Prystasz D., A Real World Application Used to Implement a True IDDQ based Test Strategy (Facts and Figures). Proceedings of the 7th IEEE European Test Workshop ETW02, pp. 81-86, 26-29 May 2002, Corfu, Greece.
• Manhaeve H., True IDDQ Test and its Real-life Application, Proceedings of the 9th Annual International KGD Packaging and Test Workshop, (on CDROM), September 2002, Napa, California

An electronic copy of these papers can be obtained upon simple request or download the paper “A Real World Application Used to Implement a True IDDQ based Test Strategy (Facts and Figures)” that was presented at the 2002 European Test Workshop by clicking on the file icon below.

Motivation:

Development of a Cost Effective Deep sub-micron (DSM) Test Strategy based on an optimal use of Scan, Functional and fast IDDQ tests

Project Objectives:

• Evaluate DSM IDDQ application within production test constraints
• Evaluate IDDQ test effectiveness
• Selection of an ‘optimal’ IDDQ test strategy
• Compare IDDQ test strategy effectiveness
• Constraints:
• Ease of application in a production test environment

Module and Test platform

• QD-1010 Advanced IDDQ measurement module.
• Teradyne Catalyst

Test Vehicles:

• Audio Product
• 0.18µm CMOS - 395 K gates
• Estimated max leakage: 80µA
• Typical leakage < 10µA
• 100 IDDQ strobes/die - 95.3% IDDQ Fault coverage
• Technology Test Chip
• 0.35µm CMOS - 500K gates – 16Kx16 SRAM – BIST - Logic
• Estimated Core leakage: < 1µA
• 123 IDDQ strobes/die  -  96% IDDQ Fault coverage

Measurement Module Validation Results:

• ATE (Catalyst) measurement resource specs:
• matrix source - 2mA range, 14 bit
• Nominal resolution: 250nA
• Accuracy: + (0.1% measure + 1uA)
• QD-1010 module measurement specs:
• multiple threshold programmable module
• 1mA range, 16 bit - 4 samples,
• better than 90nA measurement repeatability

To compare the two measurement instruments an experiment was run whereby measurements were taken on multiple vectors with both the ATE and the QD-1010. Each measurement was repeated 100 times
The graphs shows the standard deviation of the measurements for each vector. The “IDDq_STOP” measurements are the ATE measurements, the “IDDq_FAST” measurements are the QD-1010 measurements.

Results:

The QD-1010, with a typical measurement time of 100µs per measurement, offers also a 10 times better measurement repeatability and resolution compared to the ATE, resulting in a considerable test time reduction, thereby reducing test costs and supporting product quality improvement at no extra cost.

A return of investment (ROI) was observed after testing 60K devices.

Conclusion:

ST-Microelectronics experienced significant test time reductions, leading to considerable cost savings combined with a short ROI when making use of Q-Star Test’s high quality and high speed loadboard solutions.
The use of a loadboard measurement modules enables further test optimization and the QD-1010 measurement resolution and the on-board data processing capabilities support DSM IDDQ test strategies, making the module a standard part of the test setup.

References:

• Fudoli A., Ascagni A., Appello D., Manhaeve H. , A Practical Evaluation of IDDQ Test Strategies for Deep Submicron Production Test Application. Experiences and Targets from the Field. Proceedings of the 8th IEEE European Test Workshop ETW2003, pp. , 25-28 May 2003, Maastricht, The Netherlands.

An electronic copy of this paper can be obtained upon simple request or download the paper that was presented at the 2003 European Test Workshop by clicking on the file icon below.

Motivation:

• Defective devices deviate from normal distribution and Increased variance causes the bell curve to be distorted.
• Using a single limit results in a loss of quality or a reduction in yield.
• To overcome this the data of each individual die needs to be looked at
• Explore the advantages of real time advanced measurement strategies:
• Lot-to-lot / die-to-die dispersion independence decision making
• ATE & set-up dispersion independence
• Explore the advantages of real time data processing features and evaluate the applicability of advanced real time screening algorithms in production test with a focus on:
• Ability to on-the-fly recalculate decision limits
• Adaptive limit setting
• Test program independent limit setting

Project Objectives:

• Development of a die-to-die dispersion independent DSM Test Strategy based on the Current Ratios IDDQ methodology
• Evaluate DSM IDDQ application within production test constraints
• Development and realization of Setup and subcontractor independent test programs

Module and Test platform

• QD-1011 Advanced IDDQ measurement module
• High speed IDDQ measurement architecture (100µs)
• On-board data processor & memory (SRAM & EEPROM)
• Custom Firmware for Current Ratios IDDQ support
• Limits are calculated by the module based on first measurement and on base of 5 Parameters that are programmed into device EEPROM after product characterization, being Spec Limit, Upper Limit Slope, Upper Limit Intercept, Lower Limit Slope, Lower Limit Intercept
• Various test platforms

The Recipe:

• Use ATPG to generate 1000 IDDQ Vectors
• Collect IDDQ data for one device
• Build a histogram and verify Normal Distribution
• Perform Temperature analysis on one device from 0C to 100C to validate IDDQ vector quality
• Characterize split lot material
• Extract equations for Max and σ in terms of Min
• Set Upper and lower limits
• Program the IDD modules by loading the parameters for the Current Ratios monitor firmware
• Run test on 100 devices to ensure that the modules are correctly programmed
• Send modules and test program to Production test facility

Test Vehicles:

• The strategy was validated using 2 devices running in production.

Conclusion:

A die-to-die and test set-up independent DSM strategy based on Current Ratios was developed & successfully implemented in a production test environment. SMA experienced a significant improvement of the production quality, test subcontractor independence and a reduction of the overall test time. These  achievements were only made possible through the use of an advanced IDDQ measurement module.

References:

• Ackerman R. , Doing More with Less: A Recipe for Rapid IDDQ Development, Digest of papers of the 9th IEEE European Test Symposium ETS2004, pp. , 273-278, May 2004, Ajaccio, Corsica, France.

An electronic copy of this paper can be obtained upon simple request or download the paper that was presented at the 2004 European Test Symposium by clicking on the file icon below.

Motivation:

• Reduce Failure Analysis time by combining IDDQ, Luiquid Crystal and EMMI
• Enable Faster and Better Failure Analysis
• Better matching of Failure Analysis data with production test data.

Project Objectives:

• Reduce Failure Analysis Time and Efforts
• Evaluate the combination of IDDQ, Luiquid Crystal and EMMI
• Reuse existing production test programs
• Improve the matching of the Production Test Data with the Failure Analysis Data

Module and Test platform

• QD-1011 Advanced IDDQ measurement module.
• Inovys Ocelot & Personal Ocelot

Test Vehicles:

• The validation of the approach was done based on several high volume production devices requiring failure analysis.

Results & Conclusions:

The use of low-cost DFT systems in combination with Q-Star IDDQ measurement solutions provides a 100% failure correlation between the FA lab and the production ATE and to reuse the available IDDQ vectors to quickly identify the root cause of the failure by combining IDDQ with Liquid Cristal and EMMI.

Previously IDDQ measurements were related to toggling the supply, however this did not always provided the proper DUT status to enable failure location and did not match with production ATE failing results, extending FA search times.

References:

• M. Rasas et all, “A simple, cost effective and very sensitive alternative for Photo Emission Spectroscopy”, ¨Proceedings of the 23rd International Symposium for Testing and Failure Analysis, 27-31 October 1997, Santa Clara, California
• M. Rasas et all, “Analysis of IDDQ failures by spectral photon emission microscopy”, Journal of Microelectronics Reliability 38 (1998), pp 877-882.
• M. Rasas et all, “Spectroscopic Identification of light emitted from defects in silicon devices”, Journal of applied physics, Volume 89, number 1, 1 January 2001, pp. 249-258.

Q-Star Test Products are fully Supported by Teseda yielding:

• High speed, high quality IDDQ test capabilities
• Seamless hardware integration
• Validation of advanced IDDQ test approaches and DSM test strategies
• Fast debugging/validation of IDDQ vector sets
• Supporting True IDDQ test methodologies
• Test time reduction -  Quality improvement

Teseda V520 system with Interface board and QD-1011 monitor

Q-Star Test Products are fully Supported by Verigy’s Ocelot & Personal Ocelot yielding:

• High speed, high quality IDDQ test capabilities
• Seamless hardware integration
• Validation of advanced IDDQ test approaches and DSM test strategies
• Fast debugging/validation of IDDQ vector sets
• Supporting True IDDQ test methodologies
• Test time reduction -  Quality improvement

Verigy Personal Ocelot with QD-1011 module on loadboard

Formerly being products of Inovys, now being part of the Inovys DfX Solutions group of Verigy, the Ocelot and Personal Ocelot test platforms and related software technologies provide low cost methods for testing, bridging the gap between electronic design automation (EDA) and test, enabling reduced debug time and yield acceleration for semiconductor design and production. Inovys was founded in 1999 to develop practical, economic, and scalable solutions for the semiconductor industry’s move to DFT and was acquired by Verigy in 2008.  Verigy’s Ocelot and Personal Ocelot platform support Q-Star’s QD-1011 and QD-1011HC products in a plug and play fashion.

Q-Star’s products are also easily supported by Verigy’s 93000 system, thereby making use of its multi-port operating system.